We are looking for:
1. Fresh grads with Interest in AI, ML, and particularly in computer vision.
2. FPGA engineer (some hands on experience maybe college projects)
Email at [email protected]
Or DM
Timing closure can be a challenge for FPGA development. This week I am looking at some of the steps we can take to achieve a baseline timing closure on AMD FPGAs. There is a lot we can do before we even get to the place and route stage
#fpga #embeddedsystems #engineering
The best Neo Geo Cabinet I personal have seen.
CRT Sony PVM with some Mister FPGA power !
#retrogaming #custom #game
#game s #videogame #videogame s
Saturn MiSTer core developer Sergiy Dvodnenko is cracking down on 'regression' updates in his most recent updates — read about the improvements in my story:
segasaturnshiro.com/2024/05/22/rad…
#sega #saturn #retrogaming #fpga #misterfpga #shmup
So... I made a 'GPU' with the #ulx3s #fpga and PipelineC (fosstodon.org/@pipelinec)... Its actually just a rasterizer with HDMI output but 'GPU' sounds more cool 😎 #gpu #rasterization #triangle #graphics #opengl #pipelinec
Oh bubble boi, maybe you can tell me what's going on with this FPGA stuff, and please, speak as you might to a young child or a Golden Retriever. It wasn't brains that got me here, I can assure you that.
Some awesome GOWIN-powered portable signal generators and oscilloscopes!
#GOWIN #SignalGenerators #SemiconductorInnovation #Oscilloscopes #PortableElectronics #FPGA